Credits: Applied Materials

Breaking past expectations, scientists in South Korea have managed to create a semiconductor logic circuit smaller than a nanometer. 1D metals were developed using the MTB (mirror twin boundary) method and applied to 2D circuits by a research team at the country’s Institute for Basic Science (IBS).

In addition to being impressive in its own right, the technology is also noteworthy for appearing well ahead of projections from the IEEE (Institute of Electrical and Electronic Engineers). The international organization created a roadmap (IRDS) that predicted that semiconductor technology would reach 0.5nm by around 2037. The IBS research resulted in sub-nanometer components with a width of just 0.4nm.

Representation of sub-nanometer transistors.
Fonte: IBS

In an unconventional way, the advances were published in a post on the IBS blog, but with the recognition of scientific publications. In the text, the scientists state (in free translation):

“The 1D MTB metallic phase was achieved by controlling the crystal structure in the existing 2D semiconductor at the atomic level, transforming it into 1D MTB. This represents a significant advancement not only for the next generation of semiconductor technology, but also for basic materials science.”

Another interesting feature of the new transistor is that it could offer direct benefits over mainstream FinFET and GAA processes. The reduced structure and narrow gate minimize “parasitic capacitance,” according to the scientists.

When will we see sub-nanometer transistors on the market?

Anyone who follows the latest news in the world of technology knows that scientific advances need a long time before they appear in products for the public. That is, when they become marketable, because in many cases they are not.

IBS scientists expect their sub-nanometer 1D MTB transistors to become a “key technology” in future high-performance devices. For now, we’re just getting to 3nm and are forecast to see 1nm transistors by 2030.

Via: Tom’s Hardware

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