Credits: Intel

Intel is working on a new microcode for its Arrow Lake series of processors that should bring major changes to its voltage-frequency behavior. This is what SkatterBencher, a well-known overclocker who appears to have privileged access to information, says.

As always, a dose of skepticism is in order when it comes to news that does not come from official sources. In any case, the overclocker comments that the changes in voltage-frequency behavior in Arrow Lake will be large, but does not explain or give examples of what they would be.

Post by SkatterBencher talking about Intel's microcode update.
Font: SkarterBencher

It is noteworthy that SkatterBencher uses the word “changes” instead of “improvements”, but that could just be a way of saying it. Replying to another user, the overclocker mentions that the changes make it difficult to determine overclocking strategies, because the behavior is different depending on the ME package.

Intel Core Ultra processor, Arrow Lake-S, illustration image
Image: Intel

In other words, the author of the post implies that he is already messing with processors using the new code. Therefore, one can imagine that a public distribution of the update should not be far away. It is worth remembering, however, that after Intel makes the new microcode available, it is still up to motherboard manufacturers to implement the update in their respective BIOS.

Fonte: WCCFTech

Intel wants to compensate for mandatory DLVR?

A few weeks ago, Intel disabled the possibility of “circumventing” DLVR for overclocking in its current line of Arrow Lake processors.

DLVR is an acronym for Digital Linear Voltage Regulator, which helps improve the energy efficiency of CPUs. For those looking for advanced overclocks, however, the feature can be a hindrance, so there was an option in the BIOS of Z890 boards to bypass DLVR.

However, with microcode 0x112, Intel disabled this option, essentially making DLVR mandatory. Now, the feature can only be disabled in cases of “extreme overclocking”, which includes the use of LN2 for cooling, for example.

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In other words, perhaps the changes for Arrow Lake that the company prepares in its new microcode are, in part, to compensate for the DLVR. But this is just speculation, until details about the update are released.

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Source: https://www.adrenaline.com.br/intel/intel-prepara-mudancas-no-comportamento-da-tensao-frequencia-em-arrow-lake-rumor/



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