PCI-SIG revealed that, although there are advances in PCIe 6.0 and PCIe 7.0 testing, they are slower than initially expected. During the Developers Conference 2024, they also point out that this could result in a delay in the adoption of new technologies.
The organization is responsible for developing the PCI Express specifications and is delaying the start of its Compliance Program. Previously scheduled to test PCIe 6.0 in March, they have now been moved to the “second quarter” – which is the current one, by the way.
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3 months of delay doesn’t sound like a big problem, as PCIe 6.0 platforms are only expected to arrive at the end of the year. The main problem is that the list of compatible product integrators will only be ready in 2025. In other words, until then, the new technology will have to rely on PCIe 5.0 hardware.
However, the PCIe 7.0 roadmap suffered greater impacts. The Compliance Program has been postponed and compatibility tests will only take place in 2028 – instead of 2027, as previously announced. Its development has reached draft 0.5 and the final version 1.0 is expected to be submitted in 2025.
PCIe 7.0 promises a data transfer rate of 16 GB/s per lane, with a maximum configuration offering 256 GB/s. Dual-simplex operations can achieve twice the speed of what will be seen in PCIe 6.0 – reaching 512 GB/s. However, with its compatibility coming in 2028, it will likely be popular from 2030 onwards.
PCI-SIG brought an initiative in August 2023, bringing together a group to ask the industry for input on the development of optical interconnects for PCIe.
This team was brought together with the goal of being technology agnostic, analyzing a variety of optical technologies and potentially creating form factors specific to PCIe solutions. These include the pluggable optical transceiver, on-board optics, optical I/O and other ideas suitable for the next generations.
Right now, the group is working on electrical and logical layers for PCIe 6.0, which will integrate the new optical standards. An update to the tests carried out – called Engineering Change Request (ECN) – is expected to take place in December 2024.
Source: Tom’s Hardware
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Source: https://www.adrenaline.com.br/tech/testes-iniciais-pcie-6-e-7-estao-atrasados/
