AMD has confirmed on its social networks that its next generation EPYC processors, codename “venice”, reached the Tape Out phase. This means that the design is finished and they are ready to start manufacturing, using the TSMC 2nm process.
The milestone was registered in an official ceremony involving AMD and TSMC because the EPYC “venice” are the first HPC products to finish in the N2 process N2 of the Taiwanese manufacturer of semiconductors. The Zen 6 architecture nuclei of the new processors for AMD date centers will be manufactured at 2nm.
“This highlights the strength of the partnership between AMD and TSMC for semiconductor manufacturing to co-optimize new architectural designs with advanced process technology,” says AMD’s official disclosure. “This also marks an important step in performing AMD’s Roadmap for CPUS and Data Centers, with ‘Venice’ on the way to a launch next year.”
“Venice” is the sixth generation of AMD EPYC processors, which have gained more and more space in the professional segment. They will use Socket SP7, supported by 12 or 16 channels for DDR5 memories, according to Videocardz.
AMD will manufacture current EPYC processors at TSMC FAB 21
Taking advantage of the confirmation of Tape Out for the “Venice” generation in the TSMC 2NM process, AMD also announced that it validated the manufacture of the current generation of EPYC processors in Taiwanese FAB 21.
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“AMD also announces the successful establishment and validation of its 5th generation EPYC products in the new TSMC manufacturing installation in Arizona, highlighting its commitment to US manufacturing,” the company said.
Lisa Su, the AMD CEO, said that first arrived in the TSMC 2NM process for HPC products and manufacturing their EPYC in Arizona “are great examples of how we are closely working together to boost innovation and deliver advanced technologies that will feed the future of computing.”
Via: VideoCardz
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Source: https://www.adrenaline.com.br/amd/amd-confirma-finalizacao-do-design-para-epyc-venice-no-processo-de-2nm-da-tsmc/
