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One of the main disputes between the major memories manufacturers in the world is currently the race to reach Nand chips with 1,000 layers. According to new information coming directly from South Korea, Samsung would be planning to overcome this barrier until 2030 – that is, in five years.
A report from The Bell explains that union methods between different wafers will be central to the development of Nand memories with so many layers. In its components, Samsung has used a method called Cell On Peripheral (COP), which places the peripheral circuit in a wafer and stack the Nand cells on top.
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As the number of layers increases, the COP begins not to be the best solution by increasing the pressure in the peripherals and decreasing its reliability. In addition, making a wafer only with Nand cells can result in plates with up to 500 layers, according to industry expert forecasts.
It is for these reasons that Samsung would be interested in the development of a hybrid wafers union technology, which had allowed more layers for Nand. The company would be working with Chinese YMTC in creating this solution, which should appear in its generation V10 of chips.
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Nand V10 from Samsung brand debut of new technology
Samsung should start large -scale production of its first V10 generation Nand chips next semester. Your new WAFERS union technology is expected to make your debut with these chips, already allowing components between 420 and 430 layers.
As the company develops other technologies to implement the creation of its Nand, the next generations should deliver more and more layers, until possibly reaching 1,000 by 2030.
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For reference today, the newly released SSD 9100 Pro Gen 5 uses Nand Memories of Samsung’s V8 generation, which reach 236 layers.
Meanwhile, it is worth remembering that Kioxia wants to get ahead of its competitor, and deliver its first 1,000 layers in 2027.
Via: TechPowerUp
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Source: https://www.adrenaline.com.br/samsung/samsung-busca-criar-memorias-nand-com-1-000-camadas-ate-2030/