Intel starts production of 3nm chips in factories in the USA and Ireland

Intel took advantage of its presence at the VLSI Symposium to announce that it has begun mass production of the advanced 3nm process. Chip manufacturing began at factories in Oregon (USA) and Ireland.

Representing a new step from their previous production with 4nm, they do not intend to manufacture just for their own use, as the semiconductor manufacturer also has open orders for commercial partners – in the same way as TSMC and Samsung work.

It is important to note that Intel will use the 3nm process to manufacture its 6th Generation Xeon processors – made for servers and expanding the use of artificial intelligence. According to information presented, the new process will perform 18% better than 4nm, with the same level of energy consumption.

This advancement is no surprise, as the Intel 4 was the first time that the manufacturer used ASML’s EUV lithography technology in its production. More experienced, they now want to go a step further. Furthermore, this level was to be reached by the end of 2023 – being postponed for a semester to improve the project.

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Among the new features presented by Intel with its 3nm process is the introduction of two different transistor group libraries. Chipmakers can now select between the high-performance 240nm height library or the high-density 210nm library.

Offering these options allows for greater flexibility and optimization in the chip design, enabling it to perform various functions – according to your customers’ preferences. And you can select three different metal scales: 14 layers for low cost, 21 layers for enhanced performance, or 18 layers – in between.

Intel’s 3nm production will be the last to use “fin-based field-effect” (finFET) transistors. The manufacturer’s next project, the 20A, will mark the transition to “gate-all-around” (GAA) transistors. It is expected to start at the end of 2024.

GAA surrounds all silicon channels, improving control over electrical flow and reducing problems such as leaky currents – as is often seen in smaller chips.

This new technology that Intel intends to apply will also be used by TSMC in 2025, while Samsung has already implemented it in its 3nm process – even though it presented difficulties during its production.

Source: Guru3D